A multi-chip module in which a plurality of semiconductor integrated circuit chips are incorporated into one package is provided with wirings for connecting the chips in the package. If a wiring has a defect, even if each chip has no defect, a multi-chip module becomes a defective product.
Such a wiring defect can be detected by a function test which is performed on the entire package. However, it is not always easy to clarify a correlation between a function defect and a wiring defect.
As background technology of the present technical field, there is JP 2008-122338 A (Patent Document 1). JP 2008-122338 A discloses a technique of inspecting wirings between circuit blocks and an inspection facilitation circuit. In FIG. 2 which is a representative drawing, an inspection pin is provided so that a signal can be applied from the outside of an IC to a cathode of a diode connected to a VDD side in an input protection circuit of an inspection target IC #i+1, and it is changed to an inspection facilitation input protection circuit. At the time of inspection, the inspection pin of the inspection target IC #i+1 is connected to a GND via a resistor Rm, and a failure excitation input “H level” is outputted from a boundary scan flip-flop to an output pin d of a connection target IC # i. An electric current flows along a current path to the inspection pin from a power voltage supply pin of IC # i towards the resistor Rm in an inspection target wiring (a wiring between a pin e of the IC #i+1 and the pin d of the IC # i). This electric current is measured, and if there is an abnormality in the electric current, it is determined as a failure. There is an advantage in that it is possible to specify a position in which a failure occurs.